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Data Orchestration in Deep Learning Accelerators (Synthesis Lectures on Computer Architecture)

Data Orchestration in Deep Learning Accelerators (Synthesis Lectures on Computer Architecture)

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Data Orchestration in Deep Learning Accelerators (Synthesis Lectures on Computer Architecture)

Data Orchestration in Deep Learning Accelerators (Synthesis Lectures on Computer Architecture)

Category

Artificial Intelligence

Deep Learning

Author

Tushar Krishna

Hyoukjun Kwon

Angshuman Parashar

Michael Pellauer

Ananda Samajdar

Publication

Packt Publishing

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This Synthesis Lecture focuses on techniques for efficient data orchestration within DNN accelerators. The End of Moore\'s Law, coupled with the increasing growth in deep learning and other AI applications has led to the emergence of custom Deep Neural Network (DNN) accelerators for energy-efficient inference on edge devices. Modern DNNs have millions of hyper parameters and involve billions of computations; this necessitates extensive data movement from memory to on-chip processing engines. It is well known that the cost of data movement today surpasses the cost of the actual computation; therefore, DNN accelerators require careful orchestration of data across on-chip compute, network, and memory elements to minimize the number of accesses to external DRAM. The book covers DNN dataflows, data reuse, buffer hierarchies, networks-on-chip, and automated design-space exploration. It concludes with data orchestration challenges with compressed and sparse DNNs and future trends. The target audience is students, engineers, and researchers interested in designing high-performance and low-energy accelerators for DNN inference.

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ISBN-10

1681738716

ISBN-13

978-1681738710

Publisher

Packt Publishing

Price

89.95

File Type

PDF

Page No.

164

Tushar Krishna

Hyoukjun Kwon

Angshuman Parashar

Angshuman Parashar

Michael Pellauer

Michael Pellauer

Ananda Samajdar

Ananda Samajdar

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