Digital Design from Scratch
Focused View
Blaine Readler
5:19:39
130 View
1 - 11 Introduction.mp4
07:16
1 - lecture-1-1.pdf
2 - 12 Boolean logic gates binary state and timing diagrams.mp4
07:46
2 - lecture-1-2.pdf
3 - 13 traffic light example coding Boolean equations.mp4
04:59
3 - lecture-1-3.pdf
4 - 14 the latch.mp4
06:50
4 - lecture-1-4.pdf
5 - 15 enabled latches series operations and risingedge pulses.mp4
08:01
5 - lecture-1-5.pdf
6 - 16 process and conditional statements clocked registers.mp4
07:26
6 - lecture-1-6.pdf
7 - 17 registertoregister transfers holdsetup time.mp4
06:54
7 - lecture-1-7.pdf
8 - 18 elsif enabled setreset flop propogation delays.mp4
06:59
8 - lecture-1-8.pdf
9 - 21 binary and hexadecimal numbers.mp4
09:55
9 - lecture-2-1.pdf
10 - 22 shift registers counters vectors and 1k vs 1K.mp4
09:22
10 - lecture-2-2.pdf
11 - 23 counter in the traffic light application edge and terminal count detect.mp4
11:47
11 - lecture-2-3.zip
12 - 24 coding from timing diagrams.mp4
09:15
12 - lecture-2-4.pdf
13 - 25 introduction to state machines.mp4
07:10
13 - lecture-2-5.pdf
14 - 26 case statements.mp4
05:14
14 - lecture-2-6.pdf
15 - 27 state machines case statements and the traffic example.mp4
07:28
15 - lecture-2-7.pdf
16 - 28 coding the simple traffic state machine.mp4
09:35
16 - lecture-2-8.pdf
17 - 31 introduction to FPGAs.mp4
10:19
17 - lecture-3-1.pdf
18 - 32 VHDL headon text editors.mp4
06:01
18 - lecture-3-2.pdf
19 - 33 entities and architectures vector types and VHDL libraries.mp4
11:56
19 - lecture-3-3.pdf
20 - 34 modular design debounce fallingedge detection.mp4
11:43
20 - lecture-3-4.pdf
21 - 35 introduction to simulation.mp4
06:43
21 - lecture-3-5.pdf
22 - 36 simulation testbench creatiing stimulus.mp4
12:24
22 - lecture-3-6.pdf
23 - 37 introduction to Modelsim constants stalling process statements.mp4
08:42
23 - lecture-3-7-downloads.zip
24 - 38 using Modelsim.mp4
14:11
24 - lecture-3-8.pdf
25 - 41 single and dualport memories.mp4
09:23
25 - lecture-4-1.pdf
26 - 42 arrays and while loops.mp4
13:41
26 - lecture-4-2-downloads.zip
27 - 43 inferred memories coded dualport memory shared bus RAM tristate buffer.mp4
08:11
27 - lecture-4-3-downloads.zip
28 - 44 FIFOs.mp4
12:44
28 - lecture-4-4-downloads.zip
29 - 45 Avalon and AXI memorymapped buses.mp4
19:02
29 - lecture-4-5.pdf
30 - 46 serial interfaces RS232 UARTs.mp4
13:57
30 - lecture-4-6-downloads.zip
31 - 47 I2C SPI clocks and timing.mp4
16:26
31 - lecture-4-7.pdf
32 - 48 introduction to DSP.mp4
08:48
32 - lecture-4-8.pdf
33 - Bonus-lecture.pdf
33 - Serial interface clock recovery.mp4
09:31
Description
Using VHDL in FPGAs from the ground up
What You'll Learn?
- Digital design basics, including logic gates, binary/hexadecimal numbers, registers, shift registers, counters, timing diagrams, propagation/setup/hold timing
- VHDL language basics, including VHDL file formats/libraries, coding logic equations, conditional statements, arrays, timing constraints
- Coding, including case statements, state machines, coding from timing diagrams, while-loops, standard/unsigned types, VHDL components (modules), simulation
- Practical examples: memories (inferred/dual port), FIFOs, memory-mapped buses, serial interfaces (RS232, UARTs, I2C, SPI), DSP, PLLs, Manchester/8B10B encoding
Who is this for?
What You Need to Know?
More details
DescriptionVHDL is a powerful programming language for developing FPGAs, but is useless without an in-depth understanding of digital design. This course provides the student a comprehensive working knowledge of both of these in parallel. VHDL describes digital logic, and, as such, is an ideal vehicle for developing a deep understanding of the functional power available in modern FPGA devices.
Who this course is for:
- Entry level students interested in developing programs for FPGAs.
- Technicians and engineers who would like to learn VHDL (an FPGA programming language).
VHDL is a powerful programming language for developing FPGAs, but is useless without an in-depth understanding of digital design. This course provides the student a comprehensive working knowledge of both of these in parallel. VHDL describes digital logic, and, as such, is an ideal vehicle for developing a deep understanding of the functional power available in modern FPGA devices.
Who this course is for:
- Entry level students interested in developing programs for FPGAs.
- Technicians and engineers who would like to learn VHDL (an FPGA programming language).
User Reviews
Rating
average 0
Focused display
Category
Blaine Readler
Instructor's CoursesBlaine Readler graduated from Penn State with a degree in electrical engineering, and has been developing complex digital systems for over thirty-five years. He has worked with major corporations such as IBM, General Electric, and Northrup-Grumman, as well as small start-ups. He has been designing with FPGAs since their introduction thirty years ago. He has written two FPGA-related reference books, which have sold over ten thousand copies, and has taught introductory programming classes at community colleges. He holds a number of patents, including for the FakeTV home security product.
Udemy
View courses UdemyStudents take courses primarily to improve job-related skills.Some courses generate credit toward technical certification. Udemy has made a special effort to attract corporate trainers seeking to create coursework for employees of their company.
- language english
- Training sessions 33
- duration 5:19:39
- Release Date 2022/11/26
